Burst Mode: In Burst Mode, buses are handed over to the CPU by the DMA if the whole data is completely transferred, not before that.There are 3 modes of data transfer in DMA that are described below. Control to define the mode of transfer such as read or write.It also sends word count which is the number of words in the memory block to be read or written.The starting address of the memory block where the data is available (to read) or where data are to be stored (to write). When BG (bus grant) input is 1, the CPU has relinquished the buses and DMA can communicate directly with the memory.Įxplanation: The CPU initializes the DMA by sending the given information through the data bus. When BG (bus grant) input is 0, the CPU can communicate with DMA registers. Through the use of the address bus and allowing the DMA and RS register to select inputs, the register within the DMA is chosen by the CPU. The unit communicates with the CPU through the data bus and control lines. The figure below shows the block diagram of the DMA controller. Therefore, the CPU can both read and write into the DMA registers under program control via the data bus. Note: All registers in the DMA appear to the CPU as I/O interface registers.
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